static timing analysis and signoff using Synopsys PrimeTime / PrimeTime SI (and/or Cadence Tempus) across a full multi-mode..., slack, path groups, clock latency, uncertainty, and derating concepts. Hands-on experience with Synopsys PrimeTime...
– Experience supporting semiconductor design and tapeout flows, including Calibre, ASML Brion, Cadence, Synopsys, or similar EDA...
, and upgrade paths for critical hardware and software engineering toolchains (e.g., Cadence, Synopsys, PTC Creo, Azure DevOps...
in Cadence, Synopsys, Siemens, or similar CAD/EDA environments Work closely with physical design and analog/mixed-signal teams...
: Cadence, Synopsys, Siemens, Xilinx Vivado, Altera Quartus, Questa, Modelsim, Icarus Verilog, Verilator, etc. Ability to work...
and debug tools (e.g., Synopsys, Cadence, oscilloscopes, logic analyzers, simulation environments) Strong attention to detail...
(e.g., Synopsys, Mentor Graphics). 3+ years of experience with FPGA verification using VUnit. Digital subsystem, ASIC...
with industry-standard tools (e.g. Synopsys, Mentor Graphics). Knowledge and hands-on experience with VUnit. Digital subsystem...
and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion... Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch...
) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows Experience with Synopsys PrimeTime and Cadence Tempus for timing...