Experience with Cadence (Innovus, Genus) or Synopsys ( Fusion Compiler) automated RTL-to-GDSII flows Experience with PPA tuning...
closure on advanced process nodes (5nm and below) Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler...
, build and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Synopsys). A solid understanding...
, and silicon debug. Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. Proven experience in scan insertion...
with industry-standard DFT tools such as Siemens EDA (Mentor) Tessent, Synopsys DFT Compiler, or Cadence Modus Proficiency...
on standard EDA tools from Cadence/Synopsys. Annual Hiring Range/Hourly Rate: $87,400.00 - $165,000.00 Actual compensation...
Palladium, Synopsys ZeBu, Mentor Veloce) for system-level verification and performance validation. Collaborate with design...-on experience with emulation-based verification platforms (e.g., Cadence Palladium, Synopsys ZeBu, or Mentor Veloce). Solid...
extraction) Familiarity with Synopsys tools Job Profile(s): Semiconductor Design Engineer 2 Relocation Level: TBD...
. Proven experience leading FPGA prototyping efforts for large-scale semiconductor programs. Hands-on experience with Synopsys...
, JTAG, boundary scan, and silicon debug. Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. Proven...