Principal Engineer

\. Cadence layout tools, including Innovus or Tempus or Synopsys, including ICC2 or PrimeTime;7\. PDN design and evaluation...

Lugar: Richardson, TX | 31/03/2026 21:03:22 PM | Salario: S/. No Especificado | Empresa: Micron

FPGA Circuit Design Engineer

of experience with static timing analysis (STA) and tools such as Synopsys PrimeTime 10+ years of experience using scripting...

Lugar: San Jose, CA | 30/03/2026 03:03:53 AM | Salario: S/. No Especificado | Empresa: Altera