Emulation Engineer

. Job Description: Skills: Verilog, VHDL, System Verilog, Xilinx FPGA, HAPS, Vivado, C/C++Synopsys ZeBu, Cadence Palladium/Protium... with Synopsys HAPS prototyping platforms. Solid understanding of SoC bring-up, debug methodologies, and waveform analysis...

Lugar: Austin, TX | 29/03/2026 00:03:08 AM | Salario: S/. No Especificado | Empresa: Varite

Lead ASIC DFT Engineer

in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug. Hands-on experience with Synopsys, Cadence...

Lugar: San Jose, CA | 28/03/2026 19:03:41 PM | Salario: S/. No Especificado | Empresa: Cyient

Product Manager (HPCWorks Accelerator & Flowtracer)

management, coverage analysis, and debug methodologies using industry-standard tools (e.g., Synopsys VCS, Cadence Xcelium... with tools such as Synopsys ICC/Fusion Compiler, Cadence Innovus, or similar. Understanding of ECAD infrastructure: Experience...

Lugar: Austin, TX | 27/03/2026 23:03:53 PM | Salario: S/. $109800 - 197700 per year | Empresa: Siemens