Principal/ Senior Principal Digital ASIC Circuit Design Engineer

with current ASIC design tools for all phases described below: Simulation – Mentor ModelSim, Cadence Excelium, Incisive or Synopsys... VCS - Synthesis – Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler - Static Timing – Synopsys Primetime...

Lugar: USA | 26/11/2025 18:11:15 PM | Salario: S/. $119600 - 179500 per year | Empresa: Northrop Grumman

Jr. ASIC Design Engineer

CAD/EDA design tools, such as Cadence, Synopsys and Mentor for the IC design. Familiarity with principles...

Lugar: Batavia, IL | 25/11/2025 03:11:19 AM | Salario: S/. $70800 - 100667 per year

AI Operator

: Experience with EDA (Electronic Design Automation) tools from vendors such as Cadence, Siemens, or Synopsys. This job requires...

Lugar: Fort Collins, CO | 21/11/2025 22:11:52 PM | Salario: S/. $108000 - 172800 per year | Empresa: Broadcom

R&D Engineer IC Design

with interposer designs including CoWoS, 2.5D/3D integration using Cadence Innovus/Integrity or Synopsys 3DIC compiler... (Innovus, Integrity), Synopsys (3DIC compiler), Mentor Graphics (Calibre) for layout generation, editing and verification...

Lugar: San Jose, CA | 19/11/2025 23:11:47 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom