Senior Lead Engineer - PD

) Routing Timing closure Physical verification Experience with EDA tools such as: Synopsys ICC2 / Fusion Compiler Cadence...

Lugar: Fremont, CA | 12/03/2026 18:03:57 PM | Salario: S/. $15000 - 18000 per year | Empresa: Quest Global

EMIR Technical Lead

to signoff). Industry-standard EDA tools (e.g., Redhawk/Voltus, Totem/Voltus-FI, Synopsys IC Compiler/Fusion, Cadence Innovus...

Lugar: San Jose, CA | 12/03/2026 03:03:07 AM | Salario: S/. No Especificado | Empresa: Altera

IP Design Verification Engineer

. Experience with verification tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa Experience with creating directed...

Lugar: Hillsboro, OR | 11/03/2026 22:03:20 PM | Salario: S/. No Especificado | Empresa: Intel