DFT IC Design Engineer

cycle experience in RTL/Netlist Excellent verbal and written communication skills Education and Experience Requirements...

Lugar: Colorado Springs, CO | 30/10/2025 19:10:23 PM | Salario: S/. $108000 - 172800 per year | Empresa: Broadcom

DFT IC Design Engineer

cycle experience in RTL/Netlist Excellent verbal and written communication skills Education and Experience Requirements...

Lugar: Colorado Springs, CO | 28/10/2025 23:10:39 PM | Salario: S/. $108000 - 172800 per year | Empresa: Broadcom

EDA/CAD SW Engineer

and design patterns Experience in the areas of RTL Synthesis (System Verilog - Netlist), Clock Tree Optimization, Exposure...

Lugar: San Diego, CA | 26/10/2025 01:10:26 AM | Salario: S/. No Especificado | Empresa: Qualcomm

EDA/CAD SW Engineer

- Netlist), Clock Tree Optimization, Exposure to VLSI design concepts, logic design * Excellent interpersonal and analytical...

Lugar: San Diego, CA | 25/10/2025 23:10:51 PM | Salario: S/. $98500 - 147700 per year | Empresa: Qualcomm

FE Design and Timing Engineer

to Post Synthesis netlist. Exposure to industry standard Timing, Logic Equivalence, Physical Design and Synthesis tools...

Lugar: San Diego, CA | 25/10/2025 02:10:32 AM | Salario: S/. No Especificado | Empresa: Apple

FE Design and Timing Engineer

to Post Synthesis netlist. Exposure to industry standard Timing, Logic Equivalence, Physical Design and Synthesis tools...

Lugar: San Diego, CA | 24/10/2025 23:10:36 PM | Salario: S/. No Especificado | Empresa: Apple

SoC Physical Design Engineer, PnR

partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology. Description - Work.... - Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals. - Timing, physical and electrical...

Lugar: Beaverton, OR | 24/10/2025 18:10:02 PM | Salario: S/. No Especificado | Empresa: Apple