Digital IC Design Engineer | Custom
logic synthesis. Implement checks to develop high quality netlist for P&R. Run STA and review design quality from timing...
logic synthesis. Implement checks to develop high quality netlist for P&R. Run STA and review design quality from timing...
Equivalence Checking (LEC) (RTL-to-Netlist and Netlist-to-Netlist). Understanding of SOC clocking and reset methodology...
(CI) pipelines to ensure PDK updates do not break legacy designs or connectivity logic. Netlist & Connectivity: Own the logic... for netlist extraction, ensuring that the connectivity graph generated by the code perfectly matches the physical intent...
techniques to correlate electrical characterization with design netlist and layout, supporting both design verification...
techniques to correlate electrical characterization with design netlist and layout, supporting both design verification...
(CI) pipelines to ensure PDK updates do not break legacy designs or connectivity logic. Netlist & Connectivity: Own the logic... for netlist extraction, ensuring that the connectivity graph generated by the code perfectly matches the physical intent...
with graph neural networks (GNNs) or geometric deep learning for circuit and netlist analysis Background in reinforcement...
physically aware tools Formal Verification using industry standard tools for RTL-netlist and netlist-netlist checks ECO methods...
. Perform netlist extraction and compare again the original design for data accuracy. Perform comprehensive Design Rule Checks...
across RTL, netlist, and silicon stages. Hands-on experience with Siemens Tessent tool suite for: Scan Insertion ATPG...