HBM SoC Physical Design Engineer

logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers.... Required Qualifications Strong experience in SoC physical design implementation from netlist to GDSII on advanced nodes and complex designs...

Lugar: Richardson, TX | 06/06/2026 21:06:57 PM | Salario: S/. No Especificado | Empresa: Micron

Staff Package Design Engineer

. Manage the package design cycle, including schematic creation, netlist import, footprint assignment, layout implementation..., connectivity, and netlist verification requirements. Support Engineering Change Order cycles, design updates, revision control...

Lugar: Tempe, AZ | 06/06/2026 17:06:17 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics

Staff PDK Engineer

netlist generation procedures for internal/external analog circuit simulation tools. Work closely with the EDA software...

Lugar: Beaverton, OR | 05/06/2026 02:06:11 AM | Salario: S/. No Especificado | Empresa: Analog Devices