in at least one core silicon discipline (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow. Experience with managing... leading and managing teams across the full silicon development cycle, from RTL to bringup. Experience with high-performance...
can provide. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII... and drive RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm) Define and execute hierarchical floor planning, place...
to be onsite in Maynard, MA two days a week Knowledge of the design cycle from RTL to GDSII Understanding of Static Timing...
can provide. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII... and drive RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm) Define and execute hierarchical floor planning, place...
-architecture definition to RTL implementation using Verilog/SystemVerilog or VHDL. Design & Architecture: Define, architect...
to close fullchip timing in multiple timing modes. Option to also do block level RTL design or block or top-level IP... as possible in design cycle. Reviewing block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development...
and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design or block or top... as possible in design cycle. Reviewing block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development...
), and digital RTL design (SystemVerilog). Bonus Points! Otherwise Known As Preferred Qualifications: Knowledge of mixed mode...
process through the early product life cycle: the architecture definitions, RTL implementation and quality checks.... Lead the RTL implementation from the architecture specifications and required RTL quality checks implementations. Work...
and BE ASIC flows. Maintain close interactions with RTL, NPI, Packaging, DFT, Architecture teams. Own power, performance...