Senior Emulation Engineer
as experience with compilation, debug, performance testing. Prior experience with RTL development for Emulation prototypes...
as experience with compilation, debug, performance testing. Prior experience with RTL development for Emulation prototypes...
(HDLs), such as Verilog or VHDL. Experience with RTL design and simulation tools (e.g., Synopsys, Cadence, Mentor Graphics...
. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements...
of the project. You are an experienced FPGA designer able to write RTL code, run simulations, address timing... Verilog RTL coding Experience with industry leading FPGA devices and tools. Preferred Qualifications Experience with UVM...
implementation and review Qualify RTL design by running Gate Level Simulations on netlists Collaborate with designers, architects... desirable Knowledge of formal verification tools (e.g., Jasper or VC Formal) Experience with RTL Design desirable Familiarity...
frameworks (Jest, RTL, Playwright) and CI/CD pipelines. Strong communication skills (written and verbal) and the ability...
and coverage for complex chips. You will also design RTL as per the architecture specs. Your collaboration with architects.... You will: Writing testplans Specification and test plan reviews Implementing RTL designs Building test cases, scripts, reference...
’s degree program. Familiarity with hardware description languages (HDLs), such as Verilog or VHDL. Experience with RTL design...
Contribute to FPGA Emulation of ASIC Blocks Contribute to our custom ASIC RTL code Minimum Qualifications: Bachelors +8... with minimum 5+ years of FPGA design and verification experience Experience in Verilog RTL coding and synthesis for FPGAs...
as a senior DFT verification lead in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams...