Senior ASIC Design Verification Engineer

digital designs using reusable RTL methods (Verilog, VHDL, SystemVerilog) Complex computational architectures and algorithms... experience with ASIC and/or SoC design A strong background in RTL based digital IC design using Verilog/SystemVerilog Proven...

Lugar: Minneapolis, MN | 31/01/2026 00:01:23 AM | Salario: S/. No Especificado | Empresa: Chelsea Search Group