Senior FPGA Engineer

expectations Required skills FPGA design experience including thorough design documentation, completion and review of RTL... blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design Ability...

Lugar: Englewood, CO | 24/05/2026 17:05:00 PM | Salario: S/. $130000 - 185000 per year | Empresa: SEAKR Engineering

Principal SoC Design Engineer

drives end-to-end SoC design—from architecture definition and micro-architecture specification to RTL implementation...-architecture specifications that meet stringent performance, power, and area targets. Architect and develop synthesizable RTL...

Lugar: Texas | 23/05/2026 18:05:44 PM | Salario: S/. No Especificado | Empresa: GlobalFoundries