Mgr I- Eng Sys

and design tradeoffs Experienced in all stages of FPGA and/or ASIC development including requirements management, RTL design...

Lugar: Endicott, NY | 04/01/2025 01:01:53 AM | Salario: S/. No Especificado | Empresa: BAE Systems

Intern - Design Verification

test plan, and verification. Some RTL design verification of the controller hardware, verification of firmware code... Perform RTL Code coverage and review Functional Coverage bins to achieve coverage goals Implement/Enhance/Support multiple...

Lugar: San Jose, CA | 03/01/2025 21:01:14 PM | Salario: S/. No Especificado | Empresa: Micron

Licensed Store Manager

with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...

Lugar: Dublin, OH | 03/01/2025 18:01:34 PM | Salario: S/. No Especificado | Empresa: EssilorLuxottica

FPGA Engineer

requirements and block-level micro-architectures, partition design within ASIC/FPGA, create specification documents. – Develop RTL... and/or FPGAs (internship and research experience qualifies). – 2+ years of experience in SystemVerilog, Verilog, or VHDL RTL...

Lugar: Linthicum Heights, MD | 01/01/2025 22:01:25 PM | Salario: S/. No Especificado | Empresa: Next Step Systems
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