Junior ASIC Design Verification Engineer, Amazon Leo
you will: · Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models...
you will: · Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models...
requirements into hardware specifications, develop RTL using a hardware description language, create simulation-based testbenches... and verification skills while gaining experience in RTL development, functional verification, semiconductor design workflows...
, verification, and layout teams to ensure accurate functionality, testability, and manufacturability Drive schematic‑level and RTL... digital datapath design (memory, SerDes, or SoC datapath). 2+ years of hands‑on experience with digital schematic build, RTL...
, simulation, and layout Digital RTL simulation, synthesis, & place-n-route tools Analog/RF measurement and digital capture...
with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the...
. Process and detailed understanding of layout tradeoffs are also required. Verilog/RTL design experience is a plus. Analog...
full product life cycles of: ASIC Design, FPGA Design Experience in HDL (VHDL/Verilog), implementing designs using RTL...
logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers...) across multi-mode/multi-corner (MMMC) scenarios;partner with RTL, architecture, and STA/signoff to converge designs. Integrate...
monthly Store Visit Form for review with RTL and optical team. Ensures all operating policies and procedures are followed...
in understanding RTL Design and Digital concepts Subsystem or SoC integration Integration 1P and 3P IP's, generating 3P fabrics...