Director Applications Engineering
: Front-End (RTL/SystemVerilog, CDC/RDC, lint, verification) and/or Back-End (synthesis, STA, place & route, signoff...
: Front-End (RTL/SystemVerilog, CDC/RDC, lint, verification) and/or Back-End (synthesis, STA, place & route, signoff...
Senior Staff SoC Design Engineer role focuses on SoC microarchitecture, RTL design, and full-chip integration for high... design flow — from architecture and specification through RTL development, integration, and design sign-off — in close...
for programmable logic components;writing clean, well documented RTL in VHDL/Verilog/SystemVerilog. Developing synthesis, place...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
, software development, and system validation needs across multiple teams. - Collaborate closely with RTL design, verification... environment. - Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions...
physics. ### Preferred Qualifications: Experience with digital design using Register Transfer Level (RTL) methodologies...
across multiple teams. - Collaborate closely with Senior Emulation Engineers, RTL design, verification, and firmware teams... and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions. - Optimize emulation performance...
, with a strong command of RTL design principles. Extensive experience in FPGA and front-end IC design, including architecture...
, software development, and system validation needs across multiple teams. - Collaborate closely with RTL design, verification... environment. - Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions...
performing module level design performing with Verilog RTL and function verification. Alternatively, employer will accept... performing module level design performing with Verilog RTL and function verification. Must also possess the following...