GPU Performance Architect
models - i.e., both RTL and high-level simulation to estimate potential gains Propose innovative solutions for PPA...
models - i.e., both RTL and high-level simulation to estimate potential gains Propose innovative solutions for PPA...
. Principal job responsibilities include RTL design, verification, synthesis, timing optimization, static timing verification...-speed digital IC design for 10+ years, including RTL design with System Verilog, timing optimization, verification...
within robust scripted flows. Collaborate with RTL, DV, methodology, and infrastructure teams. Debug complex infrastructure...
design involvement of Phase Array Antenna Modules with hands-on digital ASIC/SoC development, including RTL design... RTL (SystemVerilog) for control and data path logic Participate in system architecture and partitioning, collaborating...
architectures, developing RTL, validating designs, and fielding production ready hardware that meets stringent performance, cost... leadership and customers. Your responsibilities will include: Defining FPGA architecture and creating high quality RTL using...
) methodologies and implementation Contribute to physical implementation, from RTL handoff through GDSII on advanced process nodes... closely with RTL, architecture, and other hardware engineers to influence design decisions early Qualifications...
requirements management, RTL design, verification, synthesis, timing analysis, lab bring up/validation Experience working...
-ownership role. You will define top-level chip architecture, author and maintain synthesizable RTL for all soft IP control..., third-party IP management, and original RTL design. This is a foundational hire for a growing program. Strong execution...
General Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop... ** Required Qualifications: 10+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture 10+ years of Design...
Senior Director of Physical Design leads end-to‑end RTL‑to‑GDSII execution for complex, cutting‑edge SoCs while scaling... PD site. Provide senior‑level accountability for RTL‑to‑GDSII execution, including synthesis, floorplanning, power...