capture, ASIC / FPGA digital architecture and design using RTL, verification, and system integration. Support the... are authorized to access information under this program/contract. Qualifications We Prefer: RTL coding and simulation in VHDL...
, C++, and scripting languages (Python, etc.) Experience in hardware modeling and design using RTL or SystemC ACADEMIC...
Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration... are authorized to access information under this program/contract. Qualifications We Prefer: RTL coding and simulation in VHDL...
, be familiar with enhancing various RTL quality metrics for complex, hierarchical designs, and be able to automate these processes... for increased efficiency. Proficiency in both front-end (RTL) processes and back-end (Synthesis and P&R) processes is preferred...
Responsibilities Responsible for top-level or block level µArchitecture definition and RTL implementation Contribute to chip-level... of experience as a Digital Design Engineer Experience in RTL coding, synthesis and/or SoC Integration Experience in digital...
Lugar:
Sunnyvale, CA | 19/10/2025 00:10:42 AM | Salario: S/. No Especificado | Empresa:
Meta-end Design (micro-architecture, modeling, RTL), Implementation (synthesis & timing constraints), Design-for-Test (DFT... Programming experience in C, C++, Python Track 3: Digital Design / DV RTL development for modem physical and MAC layer...
components, testing, and debug - Work closely with architecture, RTL design, design verification, emulation, and software teams...
hardware micro-architecture for efficient implementation of ML algorithms. Lead HW IP development, working closely with RTL...
with 2+ years of experience in DFT, system architecture, or RTL design. Understanding of fundamental DFT topics.... Good understanding of RTL coding principles. Knowledge of high-speed interface architectures such as PCIe, USB3, DDR...
-on experience in RTL-to-GDSII flow, with a strong focus on Floor-planning, Clock Tree Synthesis, Place-n-Route (PnR), DRC and Timing... and modes using static timing analysis (STA) tools (e.g., PrimeTime). Collaborate with RTL designers to resolve timing...
Lugar:
San Diego, CA | 18/10/2025 20:10:46 PM | Salario: S/. $115600 - 173400 per year | Empresa:
Qualcomm