Digital IC Design Senior Staff Engineer

. Principal job responsibilities include RTL design, verification, synthesis, timing optimization, static timing verification...-speed digital IC design for 10+ years, including RTL design with System Verilog, timing optimization, verification...

Lugar: Santa Clara, CA | 30/04/2026 02:04:29 AM | Salario: S/. $134390 - 201300 per year | Empresa: Marvell

Staff Digital Design Engineer

design involvement of Phase Array Antenna Modules with hands-on digital ASIC/SoC development, including RTL design... RTL (SystemVerilog) for control and data path logic Participate in system architecture and partitioning, collaborating...

Lugar: San Diego, CA | 29/04/2026 23:04:04 PM | Salario: S/. $139000 - 232182 per year | Empresa: Kyocera

FPGA Engineer Lead

architectures, developing RTL, validating designs, and fielding production ready hardware that meets stringent performance, cost... leadership and customers. Your responsibilities will include: Defining FPGA architecture and creating high quality RTL using...

Lugar: Orlando, FL | 29/04/2026 23:04:48 PM | Salario: S/. No Especificado | Empresa: Lockheed Martin

Physical Design Engineer

) methodologies and implementation Contribute to physical implementation, from RTL handoff through GDSII on advanced process nodes... closely with RTL, architecture, and other hardware engineers to influence design decisions early Qualifications...

Lugar: USA | 29/04/2026 22:04:01 PM | Salario: S/. No Especificado | Empresa: Hudson River Trading

Eng Sr Prin II - Elec

requirements management, RTL design, verification, synthesis, timing analysis, lab bring up/validation Experience working...

Lugar: Manchester, NH | 29/04/2026 19:04:30 PM | Salario: S/. No Especificado | Empresa: BAE Systems

DMTS Digital Design Engineer / Chip Lead

-ownership role. You will define top-level chip architecture, author and maintain synthesizable RTL for all soft IP control..., third-party IP management, and original RTL design. This is a foundational hire for a growing program. Strong execution...

Lugar: Minneapolis, MN | 29/04/2026 19:04:23 PM | Salario: S/. No Especificado | Empresa: Micron

Principal Design Verification Engineer - QGOV

General Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop... ** Required Qualifications: 10+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture 10+ years of Design...

Lugar: San Diego, CA | 29/04/2026 17:04:16 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Senior Director, Physical Design

Senior Director of Physical Design leads end-to‑end RTL‑to‑GDSII execution for complex, cutting‑edge SoCs while scaling... PD site. Provide senior‑level accountability for RTL‑to‑GDSII execution, including synthesis, floorplanning, power...

Lugar: San Diego, CA | 29/04/2026 17:04:15 PM | Salario: S/. No Especificado | Empresa: Marvell