FPGA Intern (Winter 2026)

from a four-year university, please apply to be an Associate Engineer. Role: RTL Development for FPGA targeted applications..., memories, MCUs Write software to interface and test RTL in hardware Collaborate closely with electrical and software...

Lugar: California | 16/10/2025 22:10:58 PM | Salario: S/. $29 per hour | Empresa: Astrani

Principal Electrical Engineer - ASIC/FPGA (Onsite)

. What You Will Do: Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration.../reinstatement and must meet eligibility requirements RTL coding and simulation in Verilog or VHDL Digital circuit architecture...

Lugar: Salt Lake City, UT | 16/10/2025 20:10:42 PM | Salario: S/. No Especificado | Empresa: Raytheon Technologies

FPGA Engineer

compliance. Execute key phases of the RTL-to-GDSII flow, including high-level design, synthesis, place & route, timing analysis... of hire (U.S. Citizenship required). Proficient in ASIC/FPGA design flows, including RTL coding, simulation, synthesis...

Lugar: Bloomington, MN | 16/10/2025 19:10:55 PM | Salario: S/. No Especificado | Empresa: Moseley Technical Services

Senior Formal Verification Engineer

coverage. Drive tools to realize their best performance. Debug RTL to identify causes of failure scenarios. Contribute...-on experience with Verilog / System Verilog HDLs, temporal logic assertions, and able to understand complex RTL quickly. Excellent...

Lugar: Santa Clara, CA | 16/10/2025 02:10:33 AM | Salario: S/. No Especificado | Empresa: Nvidia