Principal Engineer Pre-Silicon Digital Verification
and automation skills: Unix/Linux shell programming, Python, Perl, etc. Drive functional coverage and RTL code coverage. Perform...
and automation skills: Unix/Linux shell programming, Python, Perl, etc. Drive functional coverage and RTL code coverage. Perform...
from a four-year university, please apply to be an Associate Engineer. Role: RTL Development for FPGA targeted applications..., memories, MCUs Write software to interface and test RTL in hardware Collaborate closely with electrical and software...
company, etc. What You Can Expect In this in-office role in Westborough, MA, you’ll work day-to-day with an RTL engineer...
. What You Will Do: Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration.../reinstatement and must meet eligibility requirements RTL coding and simulation in Verilog or VHDL Digital circuit architecture...
compliance. Execute key phases of the RTL-to-GDSII flow, including high-level design, synthesis, place & route, timing analysis... of hire (U.S. Citizenship required). Proficient in ASIC/FPGA design flows, including RTL coding, simulation, synthesis...
Provide support to the product teams for both pre and post silicon Lead the development and execution of RTL designs...
, Microarchitecture, verilog/system-verilog RTL design, Clock Domain Crossings, DFT, synthesis, and timing closure Knowledge of bus...
coverage. Drive tools to realize their best performance. Debug RTL to identify causes of failure scenarios. Contribute...-on experience with Verilog / System Verilog HDLs, temporal logic assertions, and able to understand complex RTL quickly. Excellent...
of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include...
in RTL design (Verilog/SystemVerilog), modeling (MATLAB, SystemC), and simulation. Strong communication and documentation...