IT/EDA Manager

of semiconductor design environments using commercial EDA tools. Familiarity with ASIC/FPGA flows including RTL development, logic...

Lugar: Minneapolis, MN | 16/01/2026 23:01:05 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

DFT Engineer

. Proven experience in RTL lint checking, scan compression, scan insertion, and the ATPG process. Experience in MBIST...

Lugar: USA | 16/01/2026 22:01:38 PM | Salario: S/. $108000 - 172800 per year | Empresa: Broadcom