ASIC DESIGN FOR TEST ENGINEER - Acacia

/Fuse. You will work with seasoned DFT engineers to implement and verify Design For Test. You will also interact with RTL... and implementation. Prior experience implementing scan control logic in RTL Prior experience with hierarchical ATPG and core wrapping...

Lugar: Phoenix, AZ | 04/03/2025 18:03:06 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Pre-silicon Verification Engineer

to: Develop pre-Silicon functional validation tests to verify system will meet design requirements. Create test plans for RTL... validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests...

Lugar: Santa Clara, CA | 04/03/2025 18:03:34 PM | Salario: S/. No Especificado | Empresa: Intel

GPU Performance Engineer

architecture, modern APIs and rendering techniques with great coding skills. Hands-on experience with RTL debugs...

Lugar: San Diego, CA | 04/03/2025 18:03:13 PM | Salario: S/. No Especificado | Empresa: Intel

ASIC Design Architect

design teams to ensure smooth RTL implementation, synthesis, timing closure, and signoff. Performance Analysis..., TCP/IP, BGP, MPLS, VXLAN, QoS, congestion control mechanisms. + ASIC Development Lifecycle: RTL design (Verilog...

Lugar: Roseville, CA | 03/03/2025 18:03:39 PM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

SW Dev Eng

- Programming skills (C++ and Python) - Hands-on experience in FPGA RTL design, testbench development, logic verification, timing..., CPU architecture Encryption and authentication algorithms RTL simulation FPGA emulation Problem-solving and ability...

Lugar: San Jose, CA | 02/03/2025 23:03:26 PM | Salario: S/. $115000 - 145000 per year | Empresa: Lattice Semiconductor