Technical Director, Digital Design and Verification

of RTL/Verilog, and familiarity with mid/back-end digital design Expertise in front-end digital including timing, synthesis... RTL and gates is desired Behavioral modeling of RF and AMS circuits for ASIC/Module level verification...

Lugar: San Diego, CA | 10/12/2025 18:12:20 PM | Salario: S/. No Especificado | Empresa: Murata