FPGA Engineer

, and verifying FPGAs and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL...

Lugar: Austin, TX | 16/01/2026 00:01:51 AM | Salario: S/. No Especificado | Empresa: Optiver

Principal FPGA Engineer I

and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi...

Lugar: Austin, TX | 15/01/2026 23:01:39 PM | Salario: S/. No Especificado | Empresa: CesiumAstro

Principal FPGA Engineer I

and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi...

Lugar: Melbourne, FL | 15/01/2026 23:01:41 PM | Salario: S/. No Especificado | Empresa: CesiumAstro

Camera Hardware Architecture

Processing Algorithm domain knowledge Experience in Hardware RTL design and ML based HW solutions Familiarity with Android OS...

Lugar: San Diego, CA | 15/01/2026 22:01:46 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Principal FPGA Engineer I

and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi...

Lugar: El Segundo, CA | 15/01/2026 21:01:01 PM | Salario: S/. $165000 - 199000 per year | Empresa: CesiumAstro
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