Sr. ASIC/SOC Verification Engineer (Silicon Engineering)
coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring...
ASIC System on Chip Architect
for defense and commercial applications based on our client's secure RISC-V CPU. The RTL already exists – the major task... methodologies to finalizing the RTL code, synthesis, place-and-route and verification. Be the primary technical interface...
Lugar: Salt Lake City, UT | 09/01/2026 18:01:17 PM | Salario: S/. No Especificado | Empresa: Intrepidus Talent Solutions
Design Verification Engineer (Silicon Engineering)
with scripting languages, e.g. Python for automation RTL design, chip bring-up, and post-silicon validation experience Ability...
Senior DFT Engineer
architecture, including scan insertion, boundary scan, MBIST, and JTAG. Collaborate with RTL, physical design, and verification.... Excellent debug skills for RTL and gate level simulations Experience in DFT scan insertion and or Custom Memory BIST design...
Lugar: Raleigh, NC | 09/01/2026 18:01:16 PM | Salario: S/. No Especificado | Empresa: Microsoft
Sr. Design Verification Engineer (Silicon Engineering)
coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring...
Senior Firmware Verification Engineer
, including RTL simulations and emulation platforms. Support post-silicon bring-up, validation, and characterization of PMIC...-on experience developing or using SystemVerilog testbenches. Working familiarity with hardware RTL or digital subsystem design...
Lugar: Austin, TX | 09/01/2026 18:01:08 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics
Staff Engineer, Static Timing Analysis
and adjacent market segments. In this mid-level individual contributor role, you will collaborate closely with RTL, physical... advancing cross-functional collaboration with RTL, physical design, and SoC teams to identify, debug, and resolve timing issues...
Lugar: Austin, TX | 09/01/2026 18:01:19 PM | Salario: S/. No Especificado | Empresa: Samsung
Principal CAD Engineer
communication skills Ability to run the following tasks is a plus: RTL to gates, and gates-to-gates equivalence checking Chip...
Lugar: Santa Clara, CA | 09/01/2026 03:01:11 AM | Salario: S/. $146850 - 220000 per year | Empresa: Marvell
Senior Physical Design Engineer
across block, subsystem, and top level. Coordinate with CAD, RTL/Design teams/DFT, Architecture team, Foundry interface team.... Knowledge of RTL to GDS implementation in Physical Design domain. Hands-on experience with performing LVS, DRC, ERC, Antenna...
Lugar: Hillsboro, OR | 09/01/2026 02:01:36 AM | Salario: S/. No Especificado | Empresa: Microsoft
Silicon Technical Lead
, including RTL, Physical Design (PD), Design Verification (DV), and post-silicon bringup. Define and drive the end-to-end... (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow. Experience with managing silicon vendors...
Lugar: Mountain View, CA | 09/01/2026 01:01:06 AM | Salario: S/. No Especificado | Empresa: DeepMind