CPU Design Verification Engineer

of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with architecture and RTL designers...

Lugar: Beaverton, OR | 20/12/2024 19:12:04 PM | Salario: S/. No Especificado | Empresa: Apple

ASIC DESIGN FOR TEST ENGINEER - Acacia

/Fuse. You will work with seasoned DFT engineers to implement and verify DFT. You will also interact with RTL/PD/STA... Prior experience implementing scan control logic in RTL Prior experience with hierarchical ATPG and core wrapping...

Lugar: Maynard, MA | 20/12/2024 18:12:57 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

ASIC Design Engineer

spec / micro-architecture and RTL development · Design size/timing/power optimization via micro-architecture/RTL...

Lugar: San Jose, CA | 20/12/2024 01:12:53 AM | Salario: S/. No Especificado | Empresa: Infinera