High-Level Synthesis Technologist

Algorithm/DSP implementations in HLS or RTL targeting verticals such as wireless, optical communication, image/video processing... Engineering, or Digital Hardware Design with High-Level Synthesis or traditional RTL synthesis Direct hands-on ASIC or FPGA...

Lugar: Wilsonville, OR | 11/01/2025 01:01:06 AM | Salario: S/. No Especificado | Empresa: Siemens

Hardware Engineer 2

performance projections. Work with IP Micro-architects and RTL team to incorporate low power design methodologies and power...

Lugar: Mountain View, CA | 10/01/2025 21:01:33 PM | Salario: S/. $98300 per year | Empresa: Microsoft

Physical Design Engineer

PPA (Performance, Power, Area). Experience and knowledge of hardware architecture and RTL/logic design for timing closure...

Lugar: San Jose, CA | 10/01/2025 18:01:04 PM | Salario: S/. $133300 - 186800 per year | Empresa: Cisco Systems

ASIC Design Engineer, Blink/Ring ASIC Team, Blink

early in design cycle - Execute on design specifications to deliver high quality RTL - Ensure quality by running... and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT, UPF), Power Analysis and STA - Work with pre-silicon...

Lugar: North Reading, MA | 10/01/2025 03:01:14 AM | Salario: S/. $129800 per year | Empresa: Amazon

ASIC Design Engineer - Pixel IP

Qualifications Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog. Extensive shown...

Lugar: Cupertino, CA | 10/01/2025 03:01:50 AM | Salario: S/. No Especificado | Empresa: Apple