DFT Engineer

logic scan test You will work with Physical Designers to validate the DFT timing constraints You will work with RTL... vendor tools Have good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power...

Lugar: Mountain View, CA | 10/01/2025 01:01:05 AM | Salario: S/. No Especificado | Empresa: Enfabrica

Senior SoC Technical Program Manager, Hardware Compute Group

, validation, modeling, RTL etc to drive resolution of issues and unblock progress. 5) Work with product and other program... various design phases of Silicon development which are architecture definition, RTL design, Verification, IP design, Physical...

Lugar: Sunnyvale, CA | 10/01/2025 01:01:16 AM | Salario: S/. $133900 per year | Empresa: Amazon

Electrical Engineer, Digital ASIC design

level digital implementation. In this position you will do the following: - Verilog RTL-level digital designs, debug... skills Basic RTL coding and documentation practices Verilog (preferred) or VHDL fluency in design, simulation...

Lugar: Plantation, FL | 10/01/2025 00:01:14 AM | Salario: S/. No Especificado | Empresa: Motorola Solutions

Digital Design Engineer, Project Kuiper

specification to RTL to optimizing timing / power to chip level validation. · Develop solutions optimizing customer experience.... · Ability to convert DSP algorithms into RTL code and optimize for performance, power, and area. PREFERRED QUALIFICATIONS . Master...

Lugar: Austin, TX | 09/01/2025 22:01:24 PM | Salario: S/. No Especificado | Empresa: Amazon

Sr. FPGA Design Engineer

interfaces. Responsibilities: As a member of the FPGA Design Team, you will be responsible for the design and delivery of RTL... responsibilities include: Design and development of RTL modules based on high-level requirements Make enhancements to existing IPs...

Lugar: Austin, TX | 09/01/2025 18:01:53 PM | Salario: S/. No Especificado | Empresa: Trend Micro