ASIC DESIGN FOR TEST ENGINEER - Acacia

/Fuse. You will work with seasoned DFT engineers to implement and verify DFT. You will also interact with RTL/PD/STA... Prior experience implementing scan control logic in RTL Prior experience with hierarchical ATPG and core wrapping...

Lugar: Maynard, MA | 20/12/2024 18:12:57 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

ASIC Design Engineer

spec / micro-architecture and RTL development · Design size/timing/power optimization via micro-architecture/RTL...

Lugar: San Jose, CA | 20/12/2024 01:12:53 AM | Salario: S/. No Especificado | Empresa: Infinera

Wireless RF PHY FW Engineer

/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this highly...

Lugar: Sunnyvale, CA | 19/12/2024 21:12:45 PM | Salario: S/. $121900 - 183600 per year | Empresa: Apple

Staff Engineer, ASIC Validation

with scripting languages, preferably Python Basic RTL design & verification skills & proficiency in DSP logic validation and DSP...

Lugar: San Jose, CA | 19/12/2024 18:12:27 PM | Salario: S/. No Especificado | Empresa: Infinera

Digital Design Engineer

, I/O, power consumption, area utilization, recurring cost and security functions. Implement and simulate IP blocks in RTL using... Engineering or related field In-depth knowledge and experience with digital architectures and design methods such as RTL coding...

Lugar: Salt Lake City, UT | 19/12/2024 03:12:45 AM | Salario: S/. No Especificado | Empresa: Idaho Scientific