efficient RTL to achieve design targets and specifications. - Analyze design, microarchitecture or architecture to make trade...-offs based on features, power, performance or area requirements. - Develop micro-architecture, implement SystemVerilog RTL...
Lugar:
Austin, TX | 31/12/2025 03:12:51 AM | Salario: S/. No Especificado | Empresa:
Amazon, RTL/gate level simulations & silicon debugging scripting for various IC design tasks such as STA, equivalency checks... and problem solving skills as well as hands-on lab debugging experiences Good knowledge of RTL simulation and synthesis...
Lugar:
Irvine, CA | 31/12/2025 02:12:15 AM | Salario: S/. No Especificado | Empresa:
Broadcom design document, timing constraint file ï‚· RTL coding, Lint checks, CDC, Synthesis, Equivalency checking, STA, RTL/gate... ï‚· Good knowledge of RTL simulation and synthesis. ï‚· In-depth knowledge for design for low power and design for test...
Lugar:
Irvine, CA | 31/12/2025 02:12:03 AM | Salario: S/. No Especificado | Empresa:
Broadcom:** 17950 **Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...
design document, timing constraint file ï‚· RTL coding, Lint checks, CDC, Synthesis, Equivalency checking, STA, RTL/gate... experiences ï‚· Good knowledge of RTL simulation and synthesis. ï‚· In-depth knowledge for design for low power and design...
Lugar:
Irvine, CA | 31/12/2025 00:12:50 AM | Salario: S/. $91000 - 146000 per year | Empresa:
Broadcom, LLC **Req ID:** 18884 **Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...
Lugar:
Beaumont, TX | 30/12/2025 21:12:19 PM | Salario: S/. $75000 - 85000 per year | Empresa:
Acosta design document, timing constraint file ï‚· RTL coding, Lint checks, CDC, Synthesis, Equivalency checking, STA, RTL/gate... experiences ï‚· Good knowledge of RTL simulation and synthesis. ï‚· In-depth knowledge for design for low power and design...
Lugar:
Irvine, CA | 30/12/2025 21:12:07 PM | Salario: S/. $91000 - 146000 per year | Empresa:
Broadcom test plans and engage closely with verification engineers to perform waveform reviews. Ensure RTL quality pre-DFT to ensure... the RTL is good for DFT insertion and coverage. Hold a primary role in enabling silicon by working directly with test...
architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design...
Lugar:
USA | 30/12/2025 18:12:59 PM | Salario: S/. No Especificado | Empresa:
SpaceX, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design/timing/congestion and flow...
Lugar:
USA | 30/12/2025 18:12:39 PM | Salario: S/. $140000 - 170000 per year | Empresa:
SpaceX