CPU DFT Verification Engineer

. Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...

Lugar: Santa Clara, CA | 28/10/2025 19:10:38 PM | Salario: S/. No Especificado | Empresa: Apple

Senior ASIC Design Engineer – Clocks IP

of timing closure to innovate and implement new Clocking topologies in RTL. Collaborate with Physical design and timing team..., we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. Get involved in end-to-end cycle...

Lugar: Santa Clara, CA | 28/10/2025 19:10:42 PM | Salario: S/. No Especificado | Empresa: Nvidia

Firmware Validation Engineer

team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration...

Lugar: San Francisco, CA | 28/10/2025 19:10:24 PM | Salario: S/. No Especificado | Empresa: Apple

RFIC Design Engineer

spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation...

Lugar: Los Angeles, CA | 28/10/2025 18:10:41 PM | Salario: S/. No Especificado | Empresa: Apple

Sr. FPGA Engineer (Starshield)

spacecraft Implement logic designs and signals processing algorithms in RTL Integrate designs onto FPGA/SoC platforms Bring up... with complex digital designs Experience in different stages of FPGA development: RTL design, verification, synthesis, timing...

Lugar: USA | 30/09/2025 17:09:40 PM | Salario: S/. No Especificado | Empresa: SpaceX