FPGA Verification Engineer :: Santa Clara, CA
in SystemVerilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS...
in SystemVerilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS...
of experience with Cadence and/or Synopsys tools for Static Timing Analysis 4 years of experience in static timing analysis, noise...
behavioral model verification Hands-on knowledge of standard industry EDA tools - Synopsys/Cadence Experienced with GLS...
Physics, or related field. Experience with EDA tools (Cadence, Synopsys, or equivalent) for circuit design and simulation...
and Route, Timing Analysis, and Physical Verification tools from Synopsys, Cadence, like ICC2, Fusion Compiler, DSO.AI, Innovus...
and CMM model creation is nice to have Familiarity with entire VLSI design flow and tools (Cadence/Synopsys/Mentor...