R&D Engineer Hardware 4

, Verilog, Synopsys Liberty. Preferred & Bonus Skills Mixed Signal Integration: RTL coding, synthesis, and verification...

Lugar: Chandler, AZ | 16/07/2026 01:07:06 AM | Salario: S/. $109700 - 175500 per year | Empresa: Broadcom

Senior Physical Design Engineer/Lead

-standard EDA implementation and signoff tools such as Synopsys IC Compiler II, Synopsys Fusion Compiler, Cadence Innovus..., Cadence Encounter, Synopsys PrimeTime, Synopsys StarRC (STAR-RCX), Mentor Calibre, or equivalent tools. 5+ years...

Lugar: San Jose, CA | 16/07/2026 01:07:53 AM | Salario: S/. No Especificado | Empresa: Altera

Principal Physical Design Engineer

in one or more of physical design EDA tools such as Synopsys Fusion Compiler, PrimeClosure, Primetime, Formality, VCLP, Star-RC, Redhawk SC...

Lugar: Redmond, WA | 15/07/2026 21:07:55 PM | Salario: S/. No Especificado | Empresa: Microsoft

EDA Engineer (RFIC Engineering)

flow, such as Cadence Virtuoso/Spectre, Siemens Calibre, Synopsys/Cadence digital tools, Keysight ADS, EMX/HFSS, or similar..., techfiles, display resources, or analog/RF/mixed-signal design flows Experience with Siemens Calibre DRC/LVS/PEX/xRC, Synopsys...

Lugar: USA | 15/07/2026 17:07:32 PM | Salario: S/. $125000 - 150000 per year | Empresa: SpaceX