ASIC Design Engineer

and static timing analysis (STA) Hands-on experience with RTL linting and CDC analysis (e.g., Synopsys SpyGlass) Excellent... Knowledge of SerDes, PCIe, ARM subsystems, DSPs/accelerators, or Ethernet IP Familiarity with Cadence/Mentor/Synopsys tool...

Lugar: Austin, TX | 27/03/2026 18:03:17 PM | Salario: S/. $117000 - 175000 per year | Empresa: Ericsson

HBM SoC Design Engineer

integrating complex IP blocks into large SoCs. Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens. Programming...

Lugar: Richardson, TX | 25/03/2026 21:03:12 PM | Salario: S/. No Especificado | Empresa: Micron

FPGA Design/Verification Engineer

industry-standard platforms, including Synopsys HAPS. Map ASIC RTL to emulation and FPGA-based platforms. Develop... on FPGA platforms such as Synopsys HAPS. Detailed understanding of FPGA implementation flow. Ability to develop test plans...

Lugar: Littleton, CO | 25/03/2026 18:03:12 PM | Salario: S/. No Especificado | Empresa: The Structures Company