Design/DSP/Verification Intern - Bachelor's Degree

timing diagrams Implement block level design using RTL Coding guidelines Run Synthesis and Lint flow to ensure timing... simulation or emulation platforms Hands-on experience with RTL integration and bring-up system Experience with debugging...

Lugar: Santa Clara, CA | 19/12/2025 02:12:58 AM | Salario: S/. $27 - 53 per hour | Empresa: Marvell

FPGA Engineer, LEO Payload FPGA

bitstreams. - Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing... with uArchitecture, RTL coding, FPGA optimization for timing & power, simulation, and validation Preferred Qualifications...

Lugar: Redmond, WA | 18/12/2025 23:12:09 PM | Salario: S/. No Especificado | Empresa: Amazon

Principal Physical Design Engineer

Responsible for SOC Top Level Design Planning and partitioning strategies. Responsible for RTL to GDS implementation... in Physical Design domain. Coordinate with CAD, RTL/Design teams/DFT, Architecture team, Power & Performance team, Technology team...

Lugar: Hillsboro, OR | 18/12/2025 22:12:29 PM | Salario: S/. No Especificado | Empresa: Microsoft

District Manager - Wireless

:** $75,000.00 - $85,000.00 **Company:** Premium Retail Services, LLC **Req ID:** 18462 **Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...

Lugar: Wentzville, MO | 18/12/2025 21:12:57 PM | Salario: S/. $75000 - 85000 per year | Empresa: Acosta