Staff - HIG HBM Architecture
architectures. Familiarity with RTL verification methodologies using SystemVerilog and exposure to UVM-based verification...
Lugar: Richardson, TX | 30/10/2026 19:10:23 PM | Salario: S/. No Especificado | Empresa: Micron
Principal FPGA Emulation Engineer
with our silicon RTL and DSP architects, you will bring their designs up on FPGA to validate real-time digital, mixed-signal, and power...-control architectures pre-silicon - proving out control loops, catching RTL issues early, and de-risking tape-out. These...
Lugar: Austin, TX | 30/10/2026 18:10:20 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics
Senior PD Engineer
, and Timing Closure Setup and Synthesizing RTL Timing closure through various methods and strategies;preferable in-depth... floorplanning Flow and Methodology Development Collaborating with IC Design RTL Engineers What you will Bring: TCL/PERL...
Lugar: San Jose, CA | 30/10/2026 18:10:15 PM | Salario: S/. $130000 - 190000 per year | Empresa: Quest Global
Principal/Sr Principal Engineer Systems
/Verilog), implementing designs using RTL Ability to show self as team player, able to multi-task, able to generate quality...
Lugar: USA | 30/10/2026 18:10:48 PM | Salario: S/. $98400 - 147600 per year | Empresa: Northrop Grumman
FPGA Engineer (Clearance Req: TS)
of relevant experience with a Bachelor's degree in Electrical Engineering, Computer Engineering, or PhysicsExperience with RTL...
Lugar: Annapolis Junction, MD | 30/10/2026 18:10:52 PM | Salario: S/. No Especificado | Empresa: Woodsong Technologies, LLC
CAD Design Enablement TPM
. Design and verification methodologies. RTL quality, lint, clock and reset domain crossing (CDC/RDC), constraints, simulation..., power, equivalence and signoff;front-end/back-end handoffs;early power, performance and area (PPA) estimation and RTL...
Lugar: Austin, TX | 30/10/2026 18:10:35 PM | Salario: S/. No Especificado | Empresa: Ericsson
Static Timing Analysis Engineer
Strong understanding of ASIC design flows, including RTL and place-and-route. Excellent problem-solving skills and attention...
Lugar: San Jose, CA | 30/10/2026 18:10:23 PM | Salario: S/. No Especificado | Empresa: Quest Global
Silicon CAD Technical Product Manager
. Design and verification methodologies. RTL quality, lint, clock and reset domain crossing (CDC/RDC), constraints, simulation..., power, equivalence and signoff;front-end/back-end handoffs;early power, performance and area (PPA) estimation and RTL...
Lugar: Austin, TX | 30/10/2026 18:10:16 PM | Salario: S/. No Especificado | Empresa: Ericsson
VLSI Physical Design Engineer
-standard EDA tools, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler...
Lugar: Fort Collins, CO | 30/10/2026 18:10:23 PM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise
Target Optical - Store Manager 2 #4361 Wichita KS
. Completes monthly Store Visit Form for review with RTL and optical team. Ensures all operating policies and procedures...
Lugar: Wichita, KS | 30/10/2026 18:10:40 PM | Salario: S/. No Especificado | Empresa: EssilorLuxottica