Technical Staff Engineer - Design Implementation

. The successful candidate will play a central role in shaping scalable RTL-to-silicon methodologies and driving robust.../RTL architect Conformal/Formality Deep understanding of SoC timing architecture, including clocking strategy, constraint...

Lugar: Chandler, AZ | 28/10/2026 02:10:04 AM | Salario: S/. No Especificado | Empresa: Microchip Technology

Engineer II - Design

in RTL Design for ASIC implementation Experience with RTL Design tools that include design entry, synthesis, formal... verification, RTL/gate level implementation, cross domain clocking analysis and static timing analysis Course and practical usage...

Lugar: Hauppauge, NY | 28/10/2026 01:10:31 AM | Salario: S/. $70304 - 143000 per year | Empresa: Microchip Technology

Hardware Design Engineer

, coding, verification, and lab debug activities. Develop and analyze RTL using VHDL, Verilog, or System Verilog. Perform..., training, and experience. Minimum of 6 years of experience. Experience with RTL development (VHDL, Verilog, or System Verilog...

Lugar: Annapolis Junction, MD | 28/10/2026 01:10:09 AM | Salario: S/. No Especificado | Empresa: Actalent

Senior/Principal Physical Design Engineer (remote)

Engineer to take a key role in delivering complex, high-performance ASICs from RTL/netlist through GDSII and tapeout. You’ll.... Collaborate closely with RTL design, verification, DFT, analog/mixed-signal, packaging, and other engineering teams to ensure...

Lugar: Raleigh, NC | 28/10/2026 01:10:26 AM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Principal Engineer- Design (FPGA)

and/or digital design, with solid hands-on experience in RTL coding, simulation, synthesis, and hardware implementation. Strong... proficiency in Verilog and/or SystemVerilog for synthesizable RTL design. Strong understanding of digital design fundamentals...

Lugar: Chandler, AZ | 28/10/2026 00:10:51 AM | Salario: S/. No Especificado | Empresa: Microchip Technology

Senior/Principal Physical Design Engineer (remote)

Engineer to take a key role in delivering complex, high-performance ASICs from RTL/netlist through GDSII and tapeout. You’ll.... Collaborate closely with RTL design, verification, DFT, analog/mixed-signal, packaging, and other engineering teams to ensure...

Lugar: Portland, OR | 28/10/2026 00:10:51 AM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Staff Design Verification Engineer – SoC and eFPGA

. What You'll Do Partner with architecture, RTL, firmware, and software teams to understand new features and define comprehensive... for eFPGA soft logic within SoCs, including RTL simulation, synthesis validation, and bitstream generation. Contribute...

Lugar: Texas | 27/10/2026 23:10:05 PM | Salario: S/. No Especificado | Empresa: Analog Devices