. The day-to-day Own the architecture, design, and implementation of FPGA-based digital systems Develop RTL in Verilog... Strong experience with Verilog, SystemVerilog, or VHDL Experience across multiple stages of FPGA development: architecture, RTL design...
Lugar:
Tempe, AZ | 28/03/2026 20:03:44 PM | Salario: S/. No Especificado | Empresa:
Viasat with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
related field, or equivalent practical experience At least 5 years of hands-on experience designing RTL digital logic using...
Lugar:
Irvine, CA | 28/03/2026 20:03:52 PM | Salario: S/. $130600 - 160000 per year | Empresa:
OmniVision techniques (RTL or schematic based) to optimally implement system functions. Preferred: 5+ years implantable medical device...
proven expertise in RTL design and front-end methodologies while having good software skills and a drive for improving... or related field - Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs - Experience...
Lugar:
Austin, TX | 28/03/2026 20:03:46 PM | Salario: S/. No Especificado | Empresa:
Amazon distribution of tooling, management of new and improved tooling, development of the Recommended Tool List (RTL), improvement... (RTL) Review and support MOC regional process Support the Non-Conforming Report (NCR) process, provide guidance...
Lugar:
USA | 28/03/2026 20:03:20 PM | Salario: S/. No Especificado | Empresa:
FieldCoreRTL, verification, and silicon delivery. If you enjoy building processors, working close to the hardware, and solving... microarchitecture designs Design and implement digital modules using RTL Develop and integrate processor cores including RISC-V-based...
, and DFT-specific timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation.... Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality. Act as a technical...
Lugar:
San Jose, CA | 28/03/2026 19:03:41 PM | Salario: S/. No Especificado | Empresa:
Cyient verification between Register Transfer Level (RTL) and gatelevel netlists throughout pre and postlayout stages Validate clock... with RTL design principles and hardware description languages Ability to work effectively within multidisciplinary...
Lugar:
Atlanta, GA | 28/03/2026 19:03:39 PM | Salario: S/. $119900 - 191500 per year | Empresa:
Ciena by your peers and architects You are accountable for the creation and integration of ASIC RTL source code, algorithms and functions...
Lugar:
Atlanta, GA | 28/03/2026 19:03:03 PM | Salario: S/. $119900 - 191500 per year | Empresa:
Ciena