bandwidth";is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the...). Strong RTL development capabilities and familiarity with IP level verification, synthesis, STA, and logic equivalence...
, and power consumption along with the performance analysis team. Develop/debug RTL design of different sections of the cache... Development of memory systems. Experience in RTL/micro-architecture definition. Experience in PPA (performance/power/area...
and modeling, RTL design, verification, emulation, physical design, tapeout, post-silicon bringup and qualification... audiences and customers. ● Years of expertise developed as an individual contributor in chip RTL design, verification...
microarchitecture specifications. - RTL design - Development and refinement of RTL implementations to meet functional, power...
analysis on suggested architecture(s) and algorithm(s) Perform RTL design and logic implementation of agreed architecture...
and random verification tests. Debug test failures to determine the root cause;work with RTL engineers to resolve design.... Proficient in debugging RTL code using simulation tools. Proficient in using UVM testbenches and working in Linux and Windows...
Responsibilities Drive RTL development and testing for FPGA targets/platforms to support rapid prototyping Partner with Design... (RTL, Simulation, Implementation, Hands on bring-up and debug) Experience with commercial HDL simulators (Modelsim...
-chip/system simulation, and performance analysis. Who You'll Work With You will work with front-end RTL Design...
verification tests. Debug test failures to determine the root cause;work with RTL and firmware engineers to resolve design... knowledge (x86 Core). Proficient in debugging firmware and RTL code using simulation tools. Proficient in developing...
RESPONSIBILITIES: Technical lead for high-speed VLSI design in deep sub-micron processes. Work closely with RTL and physical... Analysis, IR drop analysis, electromigration, Physical Verification and Sign Off. Comprehend complex Verilog RTL and make...