Area Manager
**Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...
Lugar: Des Moines, IA | 28/03/2026 19:03:20 PM | Salario: S/. $50000 - 55000 per year | Empresa: Acosta
UIUC Research Park Intern - Design Verification
. Responsibilities Experiment with AI tools for Silicon development: Leverage LLMs and generative agents to automate RTL generation...
Lugar: Champaign, IL | 28/03/2026 19:03:21 PM | Salario: S/. $25 - 40 per hour | Empresa: Rivian
Area Manager
**Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...
Staff/ Sr. Staff Design Verification Engineer - QGOV
General Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop... clearance ** Required Qualifications: 5+ years of work experience with RTL/FPGA design (Verilog), embedded system...
Lugar: San Diego, CA | 28/03/2026 19:03:33 PM | Salario: S/. No Especificado | Empresa: Qualcomm
Senior Firmware Engineer
and/or Verilog/SystemVerilog is essential for RTL (Register Transfer Level) design. FPGA Tools: Experience with industry-standard...
Lugar: Lexington, MA | 28/03/2026 18:03:14 PM | Salario: S/. No Especificado | Empresa: Anduril Industries
Store Manager Target Optical
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
Lugar: Fort Worth, TX | 28/03/2026 18:03:04 PM | Salario: S/. No Especificado | Empresa: EssilorLuxottica
Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
and architecture/micro-architecture, develop RTL, and optimize for area, power, and performance. You will collaborate closely... experience. RTL coding and logic design for wireless modem ASICs. Experience with synthesis, industry LINT, clock domain...
Lugar: San Diego, CA | 28/03/2026 18:03:40 PM | Salario: S/. $104000 - 156000 per year | Empresa: Qualcomm
ASIC Design Hardware Engineer - SDC/STA (Hybrid)
for physical design. Option to also do block level RTL design or block or top-level IP integration. Helping develop efficient... and clocking diagrams and collaborate with RTL design owners on SDC development. Contribute to full-chip clocking design...
Lugar: San Jose, CA | 28/03/2026 18:03:41 PM | Salario: S/. No Especificado | Empresa: Cisco Systems
Store Manager Target Optical
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
Lugar: Forney, TX | 28/03/2026 18:03:06 PM | Salario: S/. No Especificado | Empresa: EssilorLuxottica
Senior Principal AI System Architect
++, Python, RTL design, and system-level modeling Strong working knowledge of various interconnect technologies including PCIe...
Lugar: Milpitas, CA | 28/03/2026 18:03:48 PM | Salario: S/. No Especificado | Empresa: SanDisk