Design Engineer

design cycle — from RTL to GDSII and silicon bring-up. Interface with customers and internal stakeholders to support...

Lugar: Fort Collins, CO | 11/12/2025 19:12:43 PM | Salario: S/. $60200 - 96300 per year | Empresa: Broadcom

Hardware Developer Intern 2026

process, such as: Logic (RTL) design and verification, physical design, and analog/IO design Electronic design automation... following technology areas: Microprocessor/ASIC Design Skills: VHDL, Verilog, RTL, SPICE, TCL, UVM, verification, and testing...

Lugar: Texas - Minnesota | 11/12/2025 18:12:31 PM | Salario: S/. No Especificado | Empresa: IBM

Senior DFT Design Engineer

comprehensive Design for Test solutions across our semiconductor products. This role involves RTL design, verification... comprehensive test strategies that span from initial RTL development through production manufacturing. You will work at the...

Lugar: USA | 11/12/2025 18:12:22 PM | Salario: S/. No Especificado | Empresa: Intel

Entry Level Hardware Developer

(C/C++/C#, Python, or Java), hardware description languages (RTL/VHDL/Verilog), and circuit simulation tools (SPICE..., Verilog, RTL, SPICE, TCL, UVM, verification, and testing Computer Architecture coursework: VLSI Design, Microprocessors...

Lugar: USA | 11/12/2025 18:12:53 PM | Salario: S/. No Especificado | Empresa: IBM

Entry Level Hardware Developer 2026

process, such as: Logic (RTL) design and verification, physical design, and analog/IO design Electronic design automation..., Verilog, RTL, SPICE, TCL, UVM, verification, and testing Computer Architecture coursework: VLSI Design, Microprocessors...

Lugar: USA | 11/12/2025 18:12:22 PM | Salario: S/. No Especificado | Empresa: IBM

Camera Design Engineer

Image Signal Processing algorithms Own and deliver core level IP RTL design Run synthesis, review results to ensure..., Engineering, or related field. Ideal candidate to have 3+ years of industry exp. in: Verilog or VHDL RTL design Design...

Lugar: San Diego, CA | 11/12/2025 18:12:35 PM | Salario: S/. $122500 - 183700 per year | Empresa: Qualcomm

Sr. Principal Solutions Engineer - Front End

and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture...: Define and develop microarchitectural features for IPs and subsystems, ensuring they meet PPA goals. RTL Development...

Lugar: Austin, TX | 11/12/2025 03:12:40 AM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Senior Principal Engineer

efficiency. Provide technical leadership in RTL development, synthesis, timing closure, and integration of DSP blocks into SoCs...-architecture development, RTL design (SystemVerilog/Verilog), and verification using UVM. -- ASIC design flow: floorplanning...

Lugar: Colorado | 11/12/2025 02:12:27 AM | Salario: S/. $166500 - 246420 per year | Empresa: Marvell