ASIC Design Engineer - Hardware

, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs... IP and support projects by applying the performance monitoring system Run and debug RTL checks to ensure design quality...

Lugar: Austin, TX | 16/01/2025 20:01:29 PM | Salario: S/. No Especificado | Empresa: Nvidia

Silicon Design Engineer

flows Experience with SystemVerilog RTL development Experience with IC packaging, validation and production test... for both internal and customer facing interaction Proficient in debugging firmware and RTL code using simulation tools ACADEMIC...

Lugar: Rochester, NY | 16/01/2025 19:01:03 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

ASIC Design Engineer, Senior Technical Leader

and participate in micro-architecture specification reviews. Implement Verilog RTL to meet timing and performance requirements. Help... with RTL modification. Experience developing micro-architecture solutions and RTL implementation. Preferred Qualifications...

Lugar: San Jose, CA | 16/01/2025 18:01:01 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Mgr II- Eng Elec

tradeoffs Experienced in all stages of FPGA and/or ASIC development including requirements management, RTL design, synthesis...

Lugar: Manchester, NH | 16/01/2025 18:01:22 PM | Salario: S/. No Especificado | Empresa: BAE Systems

ASIC Design Engineer, Technical Leader

and participate in micro-architecture specification reviews. Implement Verilog RTL to meet timing and performance requirements. Help... and waveform debug experience. Experience resolving setup and hold timing violations with RTL modification. Experience developing...

Lugar: San Jose, CA | 16/01/2025 18:01:42 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Graphics FE Integration Engineer

. As a member of GPU FE Design integration team, you will create GPU RTL by integrating various IPs following architectural..., you will be responsible for: - RTL integration, assembly, partitioning, transformation and analysis. - Package, qualify and deliver FE design...

Lugar: Santa Clara, CA | 16/01/2025 02:01:50 AM | Salario: S/. No Especificado | Empresa: Apple

Wireless MAC Design Engineer

vertically coordinated engineering team spanning Systems/PHY/MAC architecture and design, digital RTL design and integration, RF.... Description Description - You will prepare microarchitecture and RTL for digital logic of the wireless MAC based on a set of functional requirements...

Lugar: Sunnyvale, CA | 16/01/2025 02:01:28 AM | Salario: S/. No Especificado | Empresa: Apple

Senior Digital Design Engineer

at different stages – RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence... catalog of digital IPs to enable ease of information sharing to customers across different BUs Develop User Guides for RTL...

Lugar: Wilmington, MA | 16/01/2025 00:01:12 AM | Salario: S/. No Especificado | Empresa: Analog Devices