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Miercoles, 04 de Noviembre del 2026
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Advanced ASIC FPGA Verification Engineer (Sign-on Bonus Available)

: We encourage you to apply if you have any of these preferred skills or experiences: In-depth experience using RTL simulation tools...

Lugar: Scottsdale, AZ | 24/10/2026 00:10:49 AM | Salario: S/. No Especificado | Empresa: General Dynamics

ASIC Formal Verification Engineer I, Annapurna Labs

internship(s) with hardware model checkers: JasperGold, or VC Formal. Experience or previous technical internship(s) with RTL...

Lugar: Austin, TX | 23/10/2026 23:10:26 PM | Salario: S/. No Especificado | Empresa: Amazon

Lead Power Methodology Analysis Engineer

methodologies. Experience in one or more of the following: Power modeling and estimation RTL and architecture-level power...

Lugar: Santa Clara, CA | 23/10/2026 23:10:52 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior Field Application Engineer - Emulation

experience - knowledge of SystemVerilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug. C, C++ and SystemC...

Lugar: Austin, TX | 23/10/2026 23:10:56 PM | Salario: S/. No Especificado | Empresa: Siemens

Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs

proven expertise in RTL design and front-end methodologies while having good software skills and a drive for improving... or related field - Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs - Experience...

Lugar: Austin, TX | 23/10/2026 22:10:39 PM | Salario: S/. No Especificado | Empresa: Amazon

Sr. Manager, Foundation IP (Standard Cells & Memories),, Annapurna Labs

, cost and schedule tradeoffs. - Partner with Physical Design and CAD to deploy selected IP into the RTL-to-GDSII flow...

Lugar: Cupertino, CA | 23/10/2026 22:10:02 PM | Salario: S/. No Especificado | Empresa: Amazon

Sr. Post-Silicon Systems Software Validation Engineer, Annapurna Labs

with architecture, RTL design, design verification, firmware, and software teams to ensure our next-generation AI/ML accelerators meet... - Knowledge of the full validation lifecycle from RTL simulation (SystemVerilog/UVM, VCS, Questa, Xcelium) and emulation...

Lugar: Austin, TX | 23/10/2026 22:10:20 PM | Salario: S/. No Especificado | Empresa: Amazon

ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

As an ASIC Design Engineer, you will: Develop and implement high-performance, area and power-efficient RTL designs to meet... SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints Execute lint and clock domain...

Lugar: Cupertino, CA | 23/10/2026 21:10:47 PM | Salario: S/. No Especificado | Empresa: Amazon

ASICS Design Verification Engineer

of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL. 2+ years of experience...

Lugar: San Diego, CA | 23/10/2026 21:10:07 PM | Salario: S/. $101400 - 152200 per year | Empresa: Qualcomm

Silicon Diagnosis DFT Engineer

design/verification/DFT (RTL, circuit, physical), and semiconductor physics. LOCATION: San Jose, CA This role...

Lugar: San Jose, CA | 23/10/2026 21:10:02 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices
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