SoC Chiplet Design Lead

to balance trade-offs in performance, power, cost, and features. Lead efforts in RTL design, design-for-test (DFT) strategies... from concept to high-volume production. Expertise in RTL design using Verilog or SystemVerilog. In-depth knowledge of SoC...

Lugar: Santa Clara, CA | 14/01/2025 19:01:37 PM | Salario: S/. No Especificado | Empresa: SkillTorch

SoC Design Verification Engineer - Power

failures to determine the root cause;work with RTL and firmware engineers to resolve design defects and correct test issues.../AI processor knowledge. Proficient in debugging firmware and RTL code using simulation tools. Proficient in developing and using...

Lugar: Boxborough, MA | 14/01/2025 19:01:38 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior Staff Emulation Engineer - ZEBU

design center (ODC) or staff augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification.../block-level test benches, executing verification plans, analysis/debugging RTL, and gate-level emulation failures...

Lugar: San Jose, CA | 14/01/2025 19:01:40 PM | Salario: S/. No Especificado | Empresa: Prodapt

Senior ASIC Technical Lead

-architecture specifications. Implement Verilog RTL to meet timing and performance requirements. Help define, evolve, and support...

Lugar: San Jose, CA | 14/01/2025 18:01:45 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

FPGA Engineer

and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL synthesis, writing...

Lugar: Chicago, IL | 12/01/2025 01:01:08 AM | Salario: S/. No Especificado | Empresa: Optiver

FPGA Engineer

, and verifying FPGAs and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL...

Lugar: Austin, TX | 11/01/2025 23:01:55 PM | Salario: S/. No Especificado | Empresa: Optiver