Seasonal ASIC Design Associate_2

with RTL development, circuit layout, verification, and simulation. Collaborating on ASIC tapeouts, post-silicon validation.... Familiarity with CMOS analog or digital design, RTL design (Verilog/SystemVerilog), or SoC integration. Strong analytical...

Lugar: Batavia, IL | 12/11/2025 00:11:49 AM | Salario: S/. No Especificado

R&D ENGINEER IC DESIGN

, design, RTL coding, debugging and synthesis of complex functional blocks in the Traffic Manager / Memory Management Unit used... specifications Verilog RTL coding and synthesis Testplan reviews, assertions, debugging, code and functional coverage Floor...

Lugar: San Jose, CA | 11/11/2025 22:11:08 PM | Salario: S/. No Especificado | Empresa: Broadcom

Embedded Adaptive Hardware Engineer

architecture, specifications, user guides, and design process Upgrading eFPGA architecture and RTL for the advanced features...: 5+ years of proven experience in SoC/microarchitecture design and RTL coding. Tapeout experience in advanced nodes (N4...

Lugar: San Jose, CA | 09/11/2025 01:11:10 AM | Salario: S/. No Especificado | Empresa: Analog Devices

Physical Design Methodology Engineer

, you will work closely with the architecture, IP design, RTL design, CAD, silicon technology teams and product engineers to achieve... methodologies. Top level ECO strategy for RTL, pre-physical and post-route implementation considering timing, congestion, IRdrop...

Lugar: Santa Clara, CA | 08/11/2025 18:11:12 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

GPU Modeling Engineer

with architects, RTL designers, verification engineers and software engineers to understand the GPU pipeline You design and architect... modeling experience Experience with performance profiling and analysis Some familiarity with SystemVerilog is preferred RTL...

Lugar: San Jose, CA | 08/11/2025 18:11:28 PM | Salario: S/. No Especificado | Empresa: Samsung

Digital IC design Engineer

. Implement designs using good RTL coding and low power techniques. Collaborate with the backend team to close on synthesis... to be: Fluent in System Verilog RTL coding techniques. Familiar with modern SoC architectures and various interface technologies...

Lugar: Santa Clara, CA | 08/11/2025 01:11:44 AM | Salario: S/. $121400 - 181800 per year | Empresa: Marvell