implementation and integration strategies. Work with SOC Integration and IP Design Engineers to ensure RTL quality and timeliness.../System Verilog. Experience with industry standard RTL tools and flows. Experience in high performance and low power design...
) Synopsys Fusion Compiler Synopsys Design Compiler SpyGlass RTL and Gate-Level Simulation Tools Verification... from RTL to silicon. Exposure to high-speed interfaces such as PCIe, DDR, Ethernet, USB, CXL, UCIe, or SerDes...
flows that a large silicon team uses to estimate and sign off power on its SoCs, from RTL to gate level. You will develop... and Tcl wrappers around Synopsys PrimePower, PrimeTime PX, PrimePower RTL and RTL Architect, covering gate-level power...
Zynq SoC and Altera SoC devices. Ability to testbench and simulate RTL code. Questa Simulator a bonus. Bonus Points...
methodologies. Review and sign off verification deliverables on power features for project milestones. Work with RTL team to debug...
that will require to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification THE PERSON... driven place and route of RTL blocks for high speed Datapath and control logic applications, automated design flows for clock...
: Responsible for research, design, and development of logic designs in RTL as applicable to FPGAs. Apply rigorous engineering... of hardware for mission critical systems. Design, develop, and maintain FPGA RTL logic designs. Apply engineering and DSP...
engineering experience OR equivalent experience 5+ years of RTL Verification using UVM/C verification methodology Knowledge...
: Experience working with complex digital designs Experience in different stages of FPGA development: RTL design, verification...
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