Principal Digital Design Engineer

buffer chips for DDR5, DDR6, and beyond. Job Description Propose, architect, and design RTL in Verilog for use in a mixed... specifications. Fluent in Verilog RTL coding and ASIC design methodology Expertise in digital design implementation, including...

Lugar: Duluth, GA | 15/10/2026 17:10:09 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics

Senior FPGA/Silicon Design Engineer

issues. Own development of custom IP RTL from microarchitecture through RTL implementation, verification, and post-silicon... and IP solutions. Develop high-performance, power-efficient RTL designs and drive PPA optimization across the design...

Lugar: Redmond, WA | 15/10/2026 02:10:45 AM | Salario: S/. No Especificado | Empresa: Microsoft

Senior GPU Physical Design Engineer

implementation of cutting-edge GPU designs from RTL to GDS, ensuring optimal performance, power, and area. You will be responsible...

Lugar: Folsom, CA | 15/10/2026 02:10:49 AM | Salario: S/. No Especificado | Empresa: Intel

Retail Sales Associate – Part-Time

. While this posting for a Retail Sales Associate – Part-Time at our Store 0105-Worthington Rtl Ctr-maurices-Worthington, MN 56187 remains... to this job. All replies confidential – maurices is an equal opportunity employer. Location: Store 0105-Worthington Rtl Ctr-maurices...

Lugar: Worthington, MN | 15/10/2026 02:10:02 AM | Salario: S/. No Especificado | Empresa: Maurices

Senior DFT Design Engineer

with 8+ years of industry experience in the following: 8+ years of experience in DFT design and verification at both RTL...

Lugar: San Jose, CA | 15/10/2026 01:10:52 AM | Salario: S/. No Especificado | Empresa: Altera

Embedded Firmware & FPGA Engineer

synthesizable RTL using Verilog, SystemVerilog, and/or VHDL. Develop FPGA logic for functions such as PWM generation, digital... and design practices. Develop testbenches and perform RTL simulation and functional verification to ensure designs meet...

Lugar: Youngsville, NC | 15/10/2026 01:10:17 AM | Salario: S/. $80000 - 118000 per year | Empresa: Eaton

ASIC Verification Engineer - New College Grad 2027

RTL under a variety of conditions to flush out any design bugs as early in the process as possible. What you’ll be doing...++ and RTL models in a simulation environment Debug RTL simulation failures What we need to see: Pursuing or recently...

Lugar: Santa Clara, CA | 15/10/2026 00:10:32 AM | Salario: S/. $100000 - 166750 per year | Empresa: Nvidia