RFIC Design Engineer
spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation...
Lugar: Los Angeles, CA | 29/10/2025 00:10:01 AM | Salario: S/. No Especificado | Empresa: Apple
CPU DFT Verification Engineer
. Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...
Lugar: Santa Clara, CA | 28/10/2025 23:10:55 PM | Salario: S/. $126800 - 190900 per year | Empresa: Apple
CPU Processor Power Management Verification Engineer
with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic • Develop...
Lugar: Santa Clara, CA | 28/10/2025 23:10:48 PM | Salario: S/. No Especificado | Empresa: Apple
ASIC Design and Integration Engineer
. Responsibilities Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog... industry experience Preferred Qualifications Experience: 8+ years of proven experience in ASIC design, including RTL...
Lugar: Cupertino, CA | 28/10/2025 23:10:29 PM | Salario: S/. No Especificado | Empresa: Apple
Firmware Validation Engineer
team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration...
Lugar: San Francisco, CA | 28/10/2025 23:10:03 PM | Salario: S/. No Especificado | Empresa: Apple
CPU Design Verification Engineer
responsibilities: • Work closely with architecture and RTL designers on verifying the functionality correctness of the design • Develop...
Lugar: Santa Clara, CA | 28/10/2025 22:10:22 PM | Salario: S/. No Especificado | Empresa: Apple
Principal Engineer, Physical Design
flows Provide deep technical leadership in RTL-to-GDSII implementation, including synthesis, floorplanning, place... RTL, verification, and CAD, to ensure cohesive and optimized design execution. Mentor and coach senior and junior...
Lugar: Santa Clara, CA | 28/10/2025 22:10:32 PM | Salario: S/. $146850 - 220000 per year | Empresa: Marvell
SOC Verification Engineer
team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration..., you will be responsible for pre-silicon RTL verification of block and top-level SOC. With deep understanding of SOC architecture...
Lugar: San Francisco, CA | 28/10/2025 22:10:59 PM | Salario: S/. No Especificado | Empresa: Apple
Firmware Validation Engineer
team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration...
Lugar: Los Angeles, CA | 28/10/2025 22:10:29 PM | Salario: S/. No Especificado | Empresa: Apple
CPU DFT Verification Engineer
. Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...
Lugar: Santa Clara, CA | 28/10/2025 21:10:59 PM | Salario: S/. No Especificado | Empresa: Apple