and verify power management solutions across the hardware-software stack - Collaborate with RTL and pre-silicon teams to ensure... - Understanding of RTL design and pre-silicon validation flow - Strong analytical and problem-solving skills Preferred...
Lugar:
Austin, TX | 23/10/2025 20:10:44 PM | Salario: S/. No Especificado | Empresa:
Amazon. Work with DV methodology architects to improve verification flow. Implement test plans from RTL simulation bring-up...
Lugar:
San Diego, CA | 23/10/2025 19:10:00 PM | Salario: S/. No Especificado | Empresa:
Apple. Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL...
Lugar:
Cupertino, CA | 23/10/2025 19:10:10 PM | Salario: S/. No Especificado | Empresa:
Apple. Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL...
Lugar:
Cupertino, CA | 23/10/2025 17:10:12 PM | Salario: S/. No Especificado | Empresa:
Apple stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out. Description In this role...
Lugar:
Beaverton, OR | 23/10/2025 02:10:51 AM | Salario: S/. No Especificado | Empresa:
Apple from RTL to Emulation. Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow...
Lugar:
San Diego, CA | 23/10/2025 00:10:27 AM | Salario: S/. No Especificado | Empresa:
Apple is looking for a highly experienced Signal Processing Engineer with strong capabilities in systems architecture, RTL level design...
experience. RTL design using Verilog HDL is preferred. Good trouble-shooting skills. Education Requirements: BS...
stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out. Description In this role...
Qualifications Experience with bring up, debugging and verification in Emulation. Understanding of the tool flow from RTL...
Lugar:
San Diego, CA | 22/10/2025 21:10:24 PM | Salario: S/. No Especificado | Empresa:
Apple