General Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop... ** Required Qualifications: 10+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture 10+ years of Design...
architectures, developing RTL, validating designs, and fielding production ready hardware that meets stringent performance, cost... leadership and customers. Your responsibilities will include: Defining FPGA architecture and creating high quality RTL using...
models - i.e., both RTL and high-level simulation to estimate potential gains Propose innovative solutions for PPA...
within robust scripted flows. Collaborate with RTL, DV, methodology, and infrastructure teams. Debug complex infrastructure...
design involvement of Phase Array Antenna Modules with hands-on digital ASIC/SoC development, including RTL design... RTL (SystemVerilog) for control and data path logic Participate in system architecture and partitioning, collaborating...
. Principal job responsibilities include RTL design, verification, synthesis, timing optimization, static timing verification...-speed digital IC design for 10+ years, including RTL design with System Verilog, timing optimization, verification...
-ownership role. You will define top-level chip architecture, author and maintain synthesizable RTL for all soft IP control..., third-party IP management, and original RTL design. This is a foundational hire for a growing program. Strong execution...
;preferable in-depth experience in top-level floorplanning Flow and Methodology Development Collaborating with IC Design RTL... Proficiency in related EDA Tools Full physical design cycle experience: RTL to Tape-out Excellent verbal and written...
and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture...: Define and develop microarchitectural features for IPs and subsystems, ensuring they meet PPA goals. RTL Development...
automation. Collaborate with design teams to review architecture, interface specifications, and RTL implementation...