DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well..., and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power...

Lugar: Santa Clara, CA | 09/12/2025 22:12:09 PM | Salario: S/. No Especificado | Empresa: Intel

ASIC Intern

. We are looking for interns across RTL Design, Physical Design, and Design Verification. You do not need experience across all three tracks.... Strength in one area (RTL, PD, or DV) is sufficient. As an RTL Intern at Etched, you will help design and implement the...

Lugar: San Jose, CA | 09/12/2025 22:12:09 PM | Salario: S/. No Especificado | Empresa: Etched

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well..., and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power...

Lugar: Santa Clara, CA | 09/12/2025 21:12:04 PM | Salario: S/. No Especificado | Empresa: Intel

Senior C++ Software Engineer - Chip Design Tools

and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level...: Good architecture and RTL design knowledge Strong expertise in modern C++, compiler, build systems, and database...

Lugar: Santa Clara, CA | 09/12/2025 21:12:53 PM | Salario: S/. No Especificado | Empresa: Nvidia

Product Owner

:** 17839 **Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...

Lugar: Saint Louis, MO | 09/12/2025 21:12:48 PM | Salario: S/. $100000 - 118000 per year | Empresa: Acosta