SoC Design Verification Engineer - Power

failures to determine the root cause;work with RTL and firmware engineers to resolve design defects and correct test issues.../AI processor knowledge. Proficient in debugging firmware and RTL code using simulation tools. Proficient in developing and using...

Lugar: Boxborough, MA | 14/01/2025 22:01:40 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior Physical Design Engineer

augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation...

Lugar: San Jose, CA | 14/01/2025 20:01:48 PM | Salario: S/. No Especificado | Empresa: Prodapt

Sr. Physical Design Engineer

augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation...

Lugar: San Jose, CA | 14/01/2025 20:01:04 PM | Salario: S/. No Especificado | Empresa: Prodapt

ASIC Timing Engineer, Staff

signal), timing constraints and provide solutions if required. Good understanding of RTL to GDS digital flow. Knowledge of DC...

Lugar: San Diego, CA | 14/01/2025 19:01:24 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Senior System Engineer

, logic analyzers, and lab power supplies. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands...

Lugar: Arlington, VA | 14/01/2025 19:01:41 PM | Salario: S/. No Especificado | Empresa: Leidos

Senior ASIC Technical Lead

-architecture specifications. Implement Verilog RTL to meet timing and performance requirements. Help define, evolve, and support...

Lugar: San Jose, CA | 14/01/2025 18:01:46 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Senior Staff Emulation Engineer - ZEBU

design center (ODC) or staff augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification.../block-level test benches, executing verification plans, analysis/debugging RTL, and gate-level emulation failures...

Lugar: San Jose, CA | 14/01/2025 18:01:30 PM | Salario: S/. No Especificado | Empresa: Prodapt

Bootcode Firmware Developer at Folsom, CA

test environment. Debug test failures to determine the root cause;work with RTL, DV, emulation and post-Si engineers... and RTL code using simulation tools. Proficient in using UVM testbenches and working in Linux and Windows environments. SoC...

Lugar: Folsom, CA | 14/01/2025 18:01:23 PM | Salario: S/. No Especificado | Empresa: Infobahn Softworld

Senior Physical Design Engineer

augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation...

Lugar: San Jose, CA | 14/01/2025 18:01:45 PM | Salario: S/. No Especificado | Empresa: Prodapt