Senior Quantum Engineer

specific IC design, physical design, physical verification, register transfer level (RTL) to graphic data system (GDS) flow...

Lugar: Santa Barbara, CA | 09/12/2025 19:12:44 PM | Salario: S/. No Especificado | Empresa: Microsoft

CPU Power Analysis Engineer

characterization of various CPU benchmarks using tools like PTPX and Joules. Work closely with RTL design, Synthesis, and physical... communication skills. Preferred Qualifications Experience with low power implementation techniques in RTL, Synthesis or Physical...

Lugar: Austin, TX | 09/12/2025 19:12:31 PM | Salario: S/. $122500 - 183700 per year | Empresa: Qualcomm

ASIC Digital design Manager

of digital subsystems (RTL, synthesis, DFT/DFD, STA, physical implementation) to aggressive schedule and quality targets. First..., display/camera pipelines). Strong expertise in RTL (SystemVerilog/Verilog), CDC/RDC, STA, synthesis, P&R, power intent (UPF...

Lugar: Austin, TX | 07/12/2025 18:12:23 PM | Salario: S/. No Especificado | Empresa: La Fosse Associates

ASIC Digital Design Engineer

verified RTL and silicon bring-up. You will join a multidisciplinary team developing next-generation OTPUs at the intersection... algorithms in MATLAB/Simulink or Python, ensuring functional equivalence through to gate-level sign-off. Own RTL development...

Lugar: Austin, TX | 07/12/2025 18:12:23 PM | Salario: S/. No Especificado | Empresa: La Fosse Associates

Senior FPGA Engineer

expectations Required skills FPGA design experience including thorough design documentation, completion and review of RTL... blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design Ability...

Lugar: Englewood, CO | 07/12/2025 18:12:44 PM | Salario: S/. $130000 - 185000 per year | Empresa: SEAKR Engineering

Senior Principal Digital IC Design Engineer

RTL coding and low power techniques. Collaborate with the backend team to close on synthesis, place and route, and timing... with 3rd party IP vendors and customers Expertise in System Verilog RTL coding techniques. Familiar with modern PCIe and SoC...

Lugar: Westborough, MA | 07/12/2025 01:12:19 AM | Salario: S/. No Especificado | Empresa: Marvell

FPGA Design Verification Engineer

, System Verilog, RTL). · Write and debug test cases to verify functionality, performance, and corner cases. · Identify... functions may be required. What you need: · Strong understanding of FPGA, ASIC, RTL design principles and architectures...

Lugar: Mountain View, CA | 07/12/2025 01:12:32 AM | Salario: S/. No Especificado | Empresa: UST