Sr. Physical Design Engineer

augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation...

Lugar: San Jose, CA | 14/01/2025 18:01:22 PM | Salario: S/. No Especificado | Empresa: Prodapt

FPGA Engineer

and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL synthesis, writing...

Lugar: Chicago, IL | 12/01/2025 01:01:54 AM | Salario: S/. No Especificado | Empresa: Optiver

FPGA Engineer

, and verifying FPGAs and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL...

Lugar: Austin, TX | 11/01/2025 20:01:19 PM | Salario: S/. No Especificado | Empresa: Optiver

FPGA Development Engineer, Bespoke Solutions

and obtain and maintain an active TS/SCI security clearance. Key job responsibilities - Develop custom RTL and integrate... with custom hardware. You will debug RTL in simulation, synthesize and implement ensuring it meets timing and performance...

Lugar: Arlington, VA | 11/01/2025 02:01:21 AM | Salario: S/. $129800 per year | Empresa: Amazon

High-Level Synthesis Technologist

Algorithm/DSP implementations in HLS or RTL targeting verticals such as wireless, optical communication, image/video processing... Engineering, or Digital Hardware Design with High-Level Synthesis or traditional RTL synthesis Direct hands-on ASIC or FPGA...

Lugar: Wilsonville, OR | 11/01/2025 01:01:06 AM | Salario: S/. No Especificado | Empresa: Siemens