Sr Technical Architect - Physical Design
, STA, PNR, Signoff domain. Eg. Synopsys Fusion Compiler, ICC2, PrimeTime, ICV, Cadence Innovus/Tempus, Ansys RedHawk...
, STA, PNR, Signoff domain. Eg. Synopsys Fusion Compiler, ICC2, PrimeTime, ICV, Cadence Innovus/Tempus, Ansys RedHawk...
like Synopsys Verdi, functional debug, and performance verification against required specifications. You proactively seek cross... (System Verilog/Verilog). Familiarity with waveform level debugging tools (e.g., Synopsys Verdi) and RTL debugging. Solid...
a fresh opinion, ambition, and to challenge our thinking in our goal to achieve net zero! Job Advert Role Synopsys The...
definitions Proficiency with Synopsys EDA, including DC-Topo, VCS-MX, PrimeTime, Formality, TetraMAX Proficiency with Mentor EDA...
, analysis and testing of electrical system or components Fluent in Synopsys Saber simulator and MAST Product or equivalent...
. Proficiency with Synopsys Design Compiler, timing closure methodologies, and formal verification tools (e.g., Cadence LEC...
with FPGA design tools (Xilinx Vivado, Client Quartus, Synopsys Synplify). - Proficient in SystemVerilog - Proficiency...
tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs. Strong understanding... tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus. ACADEMIC CREDENTIALS: Bachelors...
design and verification tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify). Proficient in SystemVerilog. Experience...
a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC...