Austin Hiring Event - Senior Principal Physical Design Engineer

and infrastructure in alignment with company-wide technology strategy Lead RTL-to-GDSII implementation for multiple SoC programs... technologies used in major foundries Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure...

Lugar: Austin, TX | 04/06/2026 22:06:06 PM | Salario: S/. No Especificado | Empresa: Marvell

HBM SoC Physical Design Engineer

logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers...) across multi-mode/multi-corner (MMMC) scenarios;partner with RTL, architecture, and STA/signoff to converge designs. Integrate...

Lugar: Richardson, TX | 04/06/2026 21:06:30 PM | Salario: S/. No Especificado | Empresa: Micron

Agentic AI Engineer

, and tool-calling specs that feed Cadence agents the right design context (RTL, scripts, logs, reports, methodology docs) at the... Pipelines. Curate, clean, and label datasets from EDA artifacts (RTL, waveforms, logs, reports, schematics). Build synthetic...

Lugar: USA | 04/06/2026 18:06:26 PM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Austin Hiring Event - Senior Staff Physical Design Engineer

is available for qualified candidates. Key responsibilities include: Work with design teams across various disciplines such as Digital/RTL... tools Work with RTL design teams to drive assembly and design closure. Provide technical direction, coaching...

Lugar: Austin, TX | 04/06/2026 18:06:21 PM | Salario: S/. $132500 - 196140 per year | Empresa: Marvell

ASIC Design Engineer

I'm currently hiring for Hardware Engineer opportunity in the Dallas, TX area! This role focuses on front-end RTL... and SystemVerilog blocks for an image and video processing SoC. Work on front-end RTL design, focusing on CPU/GPU-style SoC...

Lugar: Richardson, TX | 04/06/2026 18:06:49 PM | Salario: S/. No Especificado | Empresa: Actalent