Physical IC Design Engineer

Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...

Lugar: San Jose, CA | 17/12/2025 20:12:43 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

Memory Subsystem Design and Integration Engineer

your career. THE ROLE The Memory Subsystem team is seeking experienced RTL design engineers to contribute to the development... Excellent knowledge of System Verilog and Verilog language with respect to RTL design. Advanced DDR subsystem architecture...

Lugar: Austin, TX | 17/12/2025 20:12:32 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

SERDES Micro Architect

with expertise in high-speed SerDes RTL design. You have had significant success driving architecture and product requirements... SerDes IPs. THE PERSON: If you have a keen interest in high-speed SerDes and digital RTL design, excel in teamwork...

Lugar: San Jose, CA | 17/12/2025 19:12:49 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

SOC Engineer

test cases, and ensure coverage closure. Debug RTL and testbench failures using industry-standard simulators. Collaborate...

Lugar: USA | 17/12/2025 18:12:04 PM | Salario: S/. No Especificado | Empresa: Openkyber