through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure-Simulation Validation- Lab... -Develop and optimize RTL code for high-performance, resource-efficient designs -Perform timing analysis, synthesis, place...
: Defining FPGA architecture, writing RTL (VHDL/Verilog/SystemVerilog), and producing complete design packages that satisfy...
responsibilities will focus on problem solving in all aspects of the device development cycle including architecture, RTL, analog...
. Collaborate with teams across the globe. Engineers interact with architects, RTL designers, performance engineers, and post... simulation fails. Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers...
using Verilog RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA designs. Document... design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations...
to minimize the effect of parasitics, device stress, and process variation. Collaborate with digital RTL engineers on the...
: Defining FPGA architecture, writing clean RTL (VHDL/Verilog/SystemVerilog), and producing complete design packages that meet...
, RTL design, design verification, firmware, and software teams to ensure our next-generation AI/ML accelerators meet the... networks, ML HW architecture, and/or CI/CD - Familiarity with the validation lifecycle from RTL simulation (SystemVerilog/UVM...
from RTL to silicon. Throughout the day, you'll balance immediate customer needs-unblocking a team waiting for compute...
collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams About the team Why AWS... from RTL-to-GDSII - Understanding of other sign-off activities (ir/em, physical verification, DFT) Preferred Qualifications...