Electrical Engineering - Cleared Contractor - L5

specifications from system requirements Develop detailed FPGA architecture for implementation Implement design in RTL (VHDL...) and perform module level simulations Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA) Perform RTL...

Lugar: Herndon, VA | 16/12/2025 01:12:14 AM | Salario: S/. No Especificado | Empresa: LanceSoft

ASIC Digital Design Engineer

digital architecture definition, digital signal processing algorithm development, digital flow support, IP integration, RTL..., RTL design and verification of digital and mixed signal ASICs. Qualifications BS/MS in Electrical Engineering...

Lugar: Colorado Springs, CO | 15/12/2025 19:12:31 PM | Salario: S/. No Especificado | Empresa: Keysight Technologies

Senior ASIC Design Engineer

-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and using the latest process...

Lugar: Santa Clara, CA | 14/12/2025 03:12:03 AM | Salario: S/. No Especificado | Empresa: Nvidia

Product Engineer II

and experience with RTL Synthesis design flows and verification tools is recommended. Must have strong scripting skills with tcl..., perl, and other scripting languages. Technical writing skills are highly recommended. Having experience in RTL coding...

Lugar: Austin, TX | 14/12/2025 02:12:54 AM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

FPGA Engineer

, and verifying FPGAs and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL...

Lugar: New York City, NY | 14/12/2025 01:12:33 AM | Salario: S/. No Especificado | Empresa: Optiver