GPU Logic Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute... various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area...

Lugar: Folsom, CA | 06/04/2025 17:04:36 PM | Salario: S/. No Especificado | Empresa: Intel

SoC Physical Design Engineer

to: Performing physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready...

Lugar: Hillsboro, OR | 06/04/2025 17:04:42 PM | Salario: S/. No Especificado | Empresa: Intel

CT Technologist (PRN)

) registered;or registry eligible Current Radiologic Technology License (RTL) in good standing. BLS certification EXPERIENCE...

Lugar: Russellville, AR | 06/04/2025 17:04:46 PM | Salario: S/. No Especificado | Empresa: CARTI

IP Logic Design Engineer

activities including micro-architecture, RTL code from high level specs, ensure end to end design quality in terms of Lint/CDC... integration support to SoC customers and represents RTL/logic design team. Be the design owner, and review and drive test plan...

Lugar: Santa Clara, CA | 06/04/2025 17:04:53 PM | Salario: S/. No Especificado | Empresa: Intel

SRAM Circuit Design Engineer

team to create optimal GDS. - Verify extracted GDS meets design specifications. - Backend verification, IR/EM. - Write RTL... and high performance. Knowledge of Cache design/architecture, memory hierarchy is a huge plus. Working knowledge of RTL...

Lugar: Austin, TX | 06/04/2025 02:04:17 AM | Salario: S/. No Especificado | Empresa: Apple

Emulation Verification Engineer

-up, debugging, and verification in Emulation. Knowledge of tool flow from RTL to Emulation is a big plus. Proven Design...

Lugar: Sunnyvale, CA | 05/04/2025 20:04:24 PM | Salario: S/. $121900 - 183600 per year | Empresa: Apple

ASIC Implementation Engineer - Static Verification

. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints... for RDC. Perform RTL Lint and work with the Designers to create waivers. Perform RTL DFT Analysis and improve the DFT...

Lugar: Austin, TX - Sunnyvale, CA | 05/04/2025 19:04:21 PM | Salario: S/. No Especificado | Empresa: Meta