Senior Principal Digital IC Design Engineer

communication in AI clusters. What You Can Expect Design, develop, implement, verify, and document micro-architecture and RTL... implementations. Participate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding...

Lugar: Santa Clara, CA | 29/05/2026 02:05:14 AM | Salario: S/. No Especificado | Empresa: Marvell

Senior Staff Engineer, ASIC/VLSI Synthesis and Design

and validate timing constraints for intricate SoC designs. Collaborate with Architecture, RTL, DFT, and Analog teams... experience in ASIC implementation and synthesis. Strong understanding of ASIC design flows, from RTL to GDSII. Knowledge...

Lugar: San Diego, CA | 29/05/2026 02:05:39 AM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell

Staff Engineer, ASIC/VLSI Synthesis and Design

and validate timing constraints for intricate SoC designs. Collaborate with Architecture, RTL, DFT, and Analog teams... experience in ASIC implementation and synthesis. Strong understanding of ASIC design flows, from RTL to GDSII. Knowledge...

Lugar: San Diego, CA | 29/05/2026 02:05:41 AM | Salario: S/. $115200 - 170390 per year | Empresa: Marvell

Fpga Engineer

solutions for advanced defense and embedded systems. This role spans the full development lifecycle—from architecture and RTL... requirements into robust RTL architectures and designs Develop and execute testbenches to verify functionality, performance...

Lugar: Middletown, RI | 29/05/2026 01:05:38 AM | Salario: S/. $60 - 80 per hour | Empresa: Actalent