Staff SoC DFT Engineer, HBM

‑chip levels while partnering closely with register‑transfer level (RTL) design and SoC integration teams. Execute and sign..., including scan insertion, MBIST/LBIST concepts, boundary scan (JTAG), and ATPG. Experience working across full RTL‑to‑GDS SoC...

Lugar: Richardson, TX | 22/05/2026 18:05:58 PM | Salario: S/. No Especificado | Empresa: Micron

DFT Engineer

methodologies and flows to deliver efficient, repeatable results across multiple projects. Integrate DFT requirements into RTL...

Lugar: Texas | 22/05/2026 18:05:02 PM | Salario: S/. No Especificado | Empresa: GlobalFoundries

Senior FPGA Design Engineer

knowledge about RTL design, FPGA prototyping and computer architecture. As the Senior FPGA Design Engineer for Axiado..., Verification, ASIC Design and Software teams, and report into the Engineering organization. Key Responsibilities RTL design...

Lugar: San Jose, CA | 22/05/2026 17:05:14 PM | Salario: S/. $150000 - 200000 per year | Empresa: Axiado

AI/ML ASIC Architect

with other architects in the team, work with RTL/DV/Simulation/Emulation/FW teams to evaluate these changes and assess the performance...

Lugar: Milpitas, CA | 22/05/2026 17:05:23 PM | Salario: S/. No Especificado | Empresa: SanDisk